The power delivery of a microprocessor typically consists of an off-chip voltage regulator (VRM) to supply power to the on-chip devices. Typically, the supply voltage to the on-chip devices is not ideal and can exhibit temporal variations with varying frequency content (˜1 KHz to >1 GHz) due to sudden changes in circuit activity within the microprocessor as shown in FIGS. 1A and 1B. FIG. 1A illustrates a frequency response of a typical microprocessor power delivery network while FIG. 1B illustrates a transient response of a typical microprocessor power delivery network. The typical off-chip voltage regulator module typically does not have bandwidth high enough to suppress the voltage variations with frequency content above ˜1 MHz, even in the presence of decoupling capacitors at various locations in the power delivery network (PDN).
A typical microprocessor system consists of many different voltage domains that generally require many different VRMs (or multiple-output VRMs) and a large number of off-chip components, which consume valuable board area. Accordingly, having several different voltage regulator modules on dedicated dies is inefficient. Furthermore, efficient dynamic voltage and frequency scaling (DVFS) requires a fast voltage transition time which is limited to approximately 10 mV/ms from off-chip VRMs.
Another shortcoming of conventional voltage regulators is that the regulated voltage is independent of the environment variations that the on-chip devices may experience during the course of operation. For example, temperature variations and aging effects can influence the speed of on-chip devices significantly at run-time and can cause functional failures. Conventional regulators are not designed to accommodate variations in activity, temperature and aging and are, therefore, unsuited for modern high performance microprocessor systems.